Exchanging converter having a zero-voltage switching control circuit for driving an output voltage filter capacitor to partially feed back storage energy to an input side of the transformer or storage inductor

ABSTRACT

An exchanging converter includes a zero-voltage switching control circuit, which drives an output voltage filter capacitor to partially feed back storage energy to an input side thereof by means of the operation of a transformer (or storage inductor), and provides a complementary driving signal to switches in the exchanging converter when the switches reaching a zero-voltage switching control condition, so as to control turn off or turn-on time of the switches, enabling the switches to repeat the switching operation at zero-voltage again and again.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an exchanging converter with a zero potential switching control function, and more particularly to such a converter, which drives every switch to achieve a switching operation at a zero-voltage status, so as to effectively eliminate power loss due to a high frequency switching operation.

2. Description of the Prior Art

In recent years, semiconductor fabrication technology has rapidly developed, and semiconductor elements are made more and more smaller. This development trend in semiconductor fabrication drives electronic product manufacturers to create and design thinner, lighter and shorter products. However, in conventional hard type exchanging converters, a power switch is operated under a high frequency environment. This operation consumes much power, and produces much heat. In order to prevent damage due to heat, a heat sink, fan, and suitable cooling means must be installed to carry heat from the converter. Further, these conventional hard type-switching converters are expensive, and wear quickly with use. Because of the aforesaid numerous drawbacks, conventional hard type switching converters cannot be made as small as desired.

Since 1980, following the development of microcomputer, “small-size” has become more and more important in the fabrication of electronic products. In order to meet this requirement, the following converters are developed:

(1) Flyback Converter

A flyback converter, as shown in FIG. 1, comprises an input voltage filter capacitor C₁ connected between two opposite ends of an input power source V_(in) to provide a stable input voltage to a posterior converter. The posterior converter comprises a transformer. The transformer comprises a primary winding L_(p) and a secondary winding L_(s). The primary winding L_(p) is connected to a switching element S₁, forming a series loop at two opposite sides of the filter capacitor C₁. The secondary winding L_(s) is connected to a diode D₁, forming a series loop at two opposite sides of a filter capacitor C₂. Modulated high frequency from the switching element S₁ is smoothed through the posterior converter, so that the transformer provides a DC output voltage V_(o) to the load. In this flyback converter, when the switching element S₁ is on, input power source V_(in) charges the primary winding L_(p), enabling energy to be stored therein. At this time, the polarity of the primary winding L_(p) is reversed to the secondary winding L_(s), and the diode D₁ is biased reversely, and therefore the output voltage filter capacitor C₂ provides the load with the necessary energy. When the switching element S₁ is off, the magnetic flux at the transformer starts to contract, and the voltage polarity of the second winding L_(s) is reversed to produce an induced current, thereby causing the diode D₁ to be electrically connected. When the diode D₁ is electrically connected, it charges the filter capacitor C₂, enabling electricity to be outputted to the load. Because a high voltage exists in the switching element S₁ when the switching element S₁ is off, a potential energy (CV²/2) is accumulated in its parasitic capacitance. This potential energy (CV²/2) is changed into heat energy at the moment the switching element S₁ is switched off. Therefore, the switching element produces high heat under a high frequency switching environment, and wears quickly with use. U.S. Pat. No. 5,057,986 discloses a converter, which eliminates the aforesaid problem. According to this design, as shown in FIG. 2, another switching element S₂ and capacitor C_(p) are added to the primary circuit, so that the resonance formed at the parasitic capacitance of the inductance Lp, capacitor C_(p) and switching elements S₁;S₂ of the converter is utilized to achieve a zero-voltage control scheme. However, because this zero-voltage control scheme provides the necessary energy for zero-voltage control by means of the inductor Lp, zero-voltage control becomes more difficult to achieve when the load is high. U.S. Pat. No. 5,402,329 discloses another design, in which, as shown in FIG. 3, a small inductance L₁ is installed in the converter to provide the necessary energy for zero-voltage control. This inductance can be an externally added inductance, or a leakage inductance of the transformer itself. This design eliminates the drawback of the disclosure of U.S. Pat. No. 5,057,986, however because the zero-voltage control of this design relies on the stray capacitance and leakage inductance of the circuit, which is difficult to specify when designing and fabricating this structure of converter.

(2) Boost Converter

A boost converter, as shown in FIG. 4, is used to improve power factor correction. Because power factor correction runs under a high voltage environment, a voltage of about 400V exists when the switching element S₁ is switched off, and accumulated high electric energy will be changed into heat energy at the switching element S₁ at the moment the switching element S₁ is switched on, causing the service life of the switching element S₁ to be shortened. In 1992 Lee Yuan-Tse et al disclosed another design of converter, in which, as shown in FIG. 5, an auxiliary switch S₂, an inductor L₂ and a diode D₂ are added to the circuit shown in FIG. 4. When operated, the auxiliary switch S₂ is transiently turned on and maintained electrically connected until the voltage at the switching element S₁ is discharged, and the switching element S₁ is turned on to complete zero-voltage switching control when reached the status of zero-voltage is reached. This design greatly increases the cost. Because of high cost, this design is not popularly accepted. FIG. 6 shows another design according to U.S. Pat. No. 5,402,329. This design simply reduces discharge loss at the switching element S₁ due to deposit charge at the rectifier diode D₁. However, because the switching element S₁ uses a hard type switching mode, power loss under a high frequency switching operation is still significant.

(3) Buck Converter

A buck converter, as shown in FIG. 7, is designed for use under a low voltage high current condition. This design biases the reduction of turn-on power loss at the switching element S₁ and the rectifier diode D₁, however it neglects switching loss, and no application example of this design has been disclosed. FIG. 8 shows another design of a buck converter, in which power MOSFET transistors Q₁ and Q₂ are used as substitutes for the switching element S₁ and the rectifier diode D₁. Because these two transistors Q₁ and Q₂ adopt complementary switching, the advantage of low impedance of these two transistors Q₁ and Q₂ is used to reduce turn-on loss. However, because these two transistors Q₁ and Q₂ require a hard switching mode, a high power loss during switching of the switching element is inevitable when used in a high voltage condition.

SUMMARY OF THE INVENTION

The present invention has been accomplished to provide an exchanging converter with a zero-voltage switching control function, which eliminates the aforesaid drawbacks. According to the present invention, the exchanging converter comprises a zero-voltage switching control circuit. The zero-voltage switching control circuit drives an output voltage filter capacitor to partially feed back storage energy to an input side thereof by means of the operation of a transformer (or storage inductor), and provides a complementary driving signal to switches in the exchanging converter when the switches reach a zero-voltage switching control condition, so as to control turn-off or turn-on time of the switches, enabling the switches and to repeat the switching operation at zero-voltage again and again.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates the basic architecture of a conventional flyback converter.

FIG. 2 illustrates the basic architecture of a flyback converter according to U.S. Pat. No. 5,057,986.

FIG. 3 illustrates the basic architecture of a flyback converter according to U.S. Pat. No. 5,402,329.

FIG. 4 illustrates the basic architecture of a conventional boost converter.

FIG. 5 illustrates the basic architecture of a switching type boost converter according to the prior art.

FIG. 6 illustrates the basic architecture of another switching type boost converter according to the prior art.

FIG. 7 illustrates the basic architecture of a conventional buck converter.

FIG. 8 illustrates the basic architecture of a low turn-on loss type buck converter according to the prior art.

FIG. 9 illustrates the circuit architecture of an exchanging converter according to one embodiment of the present invention.

FIG. 10 illustrates voltage or current waveform of every major component part of the circuit shown in FIG. 9.

FIG. 11 illustrates the circuit architecture of an exchanging converter according to an alternate form of the present invention.

FIG. 12 illustrates voltage or current waveform of every major component part of the circuit shown in FIG. 11.

FIG. 13 illustrates the circuit architecture of an exchanging converter according to another alternate form of the present invention.

FIG. 14 illustrates voltage or current waveform of every major component part of the circuit shown in FIG. 13.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention uses a zero-voltage switching control circuit SK₁ to control a power converter, enabling an output voltage filter capacitor to partially feed back storage energy to an input side thereof by means of the operation of a transformer (or storage inductor), and to provide a complementary driving signal to switches in the exchanging converter when the switches reach a zero-voltage switching control condition, so as to control turn-off or turn-on time of the switches, enabling the switches and to repeat the switching operation at zero-voltage again and again. The zero-voltage switching control circuit SK₁ regulates its pulse width by detecting the output voltage of the exchanging converter. The switches can be power MOSFETs having a respective rectifier diode.

FIG. 9 shows a circuit design of the present invention used in a flyback converter. The circuit comprises an input voltage filter capacitor C₁ bridged the two opposite ends of input power source V_(in) to provide a stable input voltage to a posterior converter. The posterior converter comprises a transformer T₁ for storing and releasing electric energy. The transformer T₁ comprises a primary winding L_(p) and a secondary winding L_(s). The inductance of the primary winding L_(p) and the secondary winding i_(p) are i_(s), and the ratio of number of turns between the primary winding L_(p) and the secondary winding i_(p) is N:1. The primary winding L_(p) is connected in series to a primary power switch Q₁, forming a series loop bridging the two opposite ends of the filter capacitor C₁. The secondary winding L_(s) forms with a secondary power switch Q₂ a series loop bridging the two opposite ends of an output voltage filter capacitor C₂. The output voltage filter capacitor C₂ smooths the high frequency switching waveform modulated by the switches Q₁ and Q₂, so as to provide a stable DC output voltage V_(o) to the load bridging the output ends.

During operation, the voltage or current waveform of every major component part of the circuit is as shown in FIG. 10. As illustrated, when t=t₁, the control circuit SK₁ outputs a forward pulse wave driving voltage V_(GS1) to the gate of the primary power switch Q₁, causing the primary power switch Q₁ to be turned on, and at this time, the input voltage V_(in) is almost fully added to the primary winding L_(p) if the impedance of the passage is neglected. Therefore, a charging current i_(p) passes through the primary winding L_(p), and the value of the charging current i_(p) is subject to the following equation (1): $\begin{matrix} {{i_{P}(t)} = {{i_{P}\left( t_{1} \right)} + {\frac{V_{i\quad n}}{L_{P}}\left( {t - t_{1}} \right)}}} & (1) \end{matrix}$

in which, i_(p)(t₁) is the initial charging value; V_(in)/L_(p) is the charging slope. At this stage, the voltage induced by the secondary winding L_(s) is a reversed bias voltage to the rectifier diode D_(b) of the secondary power switch Q₂, and the passage at the secondary power switch Q₂ is turned off, so that i_(s)=0.

When t=t₂, the control circuit SK₁ changes the forward pulse wave driving voltage V_(GS1) to zero potential, causing the primary power switch Q₁ to be turned off, and at this time, the charging current i_(p) is turned off, and the magnetic flux established by the charging current i_(p) at the transformer T₁ starts to contract, causing the induced current i_(s) to pass from the secondary winding L_(s) to the diode D_(b) to charge the filter capacitor C₂. The value of the induced current i_(s), when the forward voltage drop of the diode D_(b) is not considered, is subject to the following equation (2): $\begin{matrix} {{i_{S}(t)} = {{{i_{P}\left( t_{2} \right)} \times N} - {\frac{V_{o}}{L_{S}}\left( {t - t_{2}} \right)}}} & (2) \end{matrix}$

in which, i_(p)(t₂)×N is the initial discharging value of the induced current i_(s), and −V_(o)/L_(s) is its discharging slope. In this embodiment, when the diode D_(b) is turned on by the induced current i_(s), the voltage V_(GS2) between the drain and source of the secondary power switch Q₂ is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at the diode D_(b). Therefore, the period where the diode D_(b) is maintained turned on is the time for the secondary power switch Q₂ to perform a zero-voltage switching operation, and t₃ can be any time spot in this period.

When t=t₃, the control circuit SK₁ outputs a forward pulse wave V_(GS2) to the gate of the secondary power switch Q₂, causing the secondary power switch Q₂ to be turned on, and at this time, the passage impedance at the secondary power switch Q₂ is lower than the diode D_(b), therefore current is mainly shunted from the diode D_(b), to the passage at the secondary power switch Q₂, and when the energy is completely discharged from the secondary winding L_(s), i.e. when i_(s)=0, the passage of the secondary power switch Q₂ is maintained turned on, and the voltage passes from the filter capacitor C₂ through the secondary power switch Q₂ to charge the secondary winding L_(s) of the transformer T₁, causing the current value of the current i_(s) to be changed to a negative value, although its charging slope is still maintained at −V_(o)/L_(s).

When the secondary winding L_(s) obtains a certain energy due to the charging operation of the capacitor C₂, i.e., when t=t₄, the control circuit SK₁ changes the driving voltage V_(GS1) to zero potential, causing the secondary power switch Q₂ to be turned off, and at this time, the current i_(s) is turned off, and the magnetic flux established by the current i_(s) at the transformer T₁ starts to contract, causing the induced current i_(p) to pass from the primary winding L_(p) to the diode D_(a) and to charge the filter capacitor C₁. The value of the current i_(p), when the forward voltage drop of the diode D_(a) is not considered, is subject to the following equation (3): $\begin{matrix} {{i_{P}(t)} = {\frac{i_{S}\left( t_{4} \right)}{N} + {\frac{V_{i\quad n}}{L_{P}}\left( {t - t_{4}} \right)}}} & (3) \end{matrix}$

in which, i_(s)(t₄)/N is the initial discharging value and ; V_(in)/L_(p) is the charging slope. In this embodiment, when the diode D_(a) is turned on, the voltage V_(DS1) between the drain and source of the primary power switch Q₁ is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at the diode D_(a). Therefore, the period where the diode D_(a) is maintained turned on is the time for the primary power switch Q₁ to perform a zero-voltage switching operation, and t₅ can be any time spot in this period.

When t=t₅, the control circuit SK₁ outputs a forward pulse wave V_(GS1) to the gate of the primary power switch Q₁, causing the primary power switch Q₁ to be turned on, and at this time, the passage impedance at the primary power switch Q₁ is lower than at the diode D_(a), causing current to be mainly shunted from the body diode D_(a), to the passage at the primary power switch Q₁, and when the energy is completely discharged from the primary winding L_(p), i.e. when i_(p)=0, the passage of the primary power switch Q₁ is maintained turned on, and the voltage passes from the filter capacitor C₁ through the primary power switch Q₁ to charge the primary winding L_(p) of the transformer T₁, so as to store energy in the transformer T₁, and at this stage, the slope of the charging current i_(p) is still maintained at V_(in)/L_(p). Therefore, by means of controlling the output time sequence of the output pulse wave V_(GS2) and the output pulse wave V_(GS1), the control circuit SK₁ drives the switches Q₁ and Q₂ to be repeatedly turned on at zero-voltage again and again to effectively reduce the switches Q₁ and Q₂ from power loss during a high frequency switching operation.

FIG. 11 shows a circuit design of the present invention used in a boost converter. The circuit comprises an input voltage filter capacitor C₁ bridging the two opposite ends of input power source V_(in), a storage inductor L₁ and a charging power switch Q₁ connected in series and bridging the two opposite ends of the filter capacitor C₁, and a discharging power switch Q₂ connected in series to the charging power switch Q₁ and forming with the charging power switch Q₁ a series loop bridging the two opposite ends of an output voltage filter capacitor C₂. The drain of the charging power switch Q₁ is connected to the source of the discharging power switch Q₂, and its source is connected to the negative terminal of the capacitor C₂, so that the filter capacitor C₂ is capable of providing a stable DC output voltage V_(o) to the load at its output end.

During operation, the voltage or current waveform of every major component part of the circuit of FIG. 11 is shown in FIG. 12. As illustrated, when t=t₁, the control circuit SK₁ outputs a forward pulse wave driving voltage V_(GS1) to the gate of the power switch Q₁, causing the power switch Q₁ to be turned on, and at this time, the passage of the power switch Q₂ is off, and the input voltage V_(in) is almost fully added to the storage inductor L₁. Therefore a charging current i₁ passes through the storage inductor L₁, and the value of the charging current i₁ is subject to the following equation (4): $\begin{matrix} {{i_{1}(t)} = {{i_{1}\left( t_{1} \right)} + {\frac{V_{i\quad n}}{L_{1}}\left( {t - t_{1}} \right)}}} & (4) \end{matrix}$

in which, i₁(t₁) is the initial charging value and; V_(in)/L₁ is the charging slope. At this stage, the input voltage V_(in) is lower than the output voltage V_(o), the voltage across the diode D_(b) of the power switch Q₂ is a reverse bias voltage, and the passage of the power switch Q₁ is turned off. Therefore, i₁=i₃, and i₂=0.

When t=t₂, the control circuit SK₁ changes the forward pulse wave driving voltage V_(GS1) to zero potential, causing the power switch Q₁ to be turned off. At this time, the induction current i₁ must be maintained in continuation, and the passage of the power switch Q₂ is maintained off, the direction of the diode D_(b) provides a path for the induction current i₁ to charge the filter capacitor C₂, and voltage at the storage inductor L₁, if the forward voltage drop of the diode D_(b) is not considered, is equal to (V_(o)−V_(in)) when the diode D_(b) is turned on, and the value of the induced current i_(s) is subject to the following equation (5): $\begin{matrix} {{i_{1}(t)} = {{i_{1}\left( t_{2} \right)} - {\frac{V_{o} - V_{i\quad n}}{L_{1}}\left( {t - t_{2}} \right)}}} & (5) \end{matrix}$

in which, i₁(t₂) is the initial discharging value of the induced current i₁, and −(V_(o)−V_(in))/L, is its discharging slope. In this embodiment, when the body diode D_(b) is turned on by the induced current i₁, the voltage V_(GS2) between the drain and source of the power switch Q₂ is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current is reached at the diode D_(b). Therefore, the period where the rectifier diode D_(b) is maintained turned on is the time for the power switch Q₂ to perform a zero-voltage switching operation, and t₃ can be any time spot in this period.

When t=t₃, the control circuit SK₁ outputs a forward pulse wave V_(GS2) to the gate of the secondary power switch Q₂, causing the power switch Q₂ to be turned on, and at this time, the passage impedance at the secondary power switch Q₂ is lower than the body diode D_(b), therefore current is mainly shunted from that of diode D_(b). Therefore, to the passage at the power switch Q₂, and when the energy is completely discharged from the storage inductor L₁, i.e. when i₁=0, the passage of the power switch Q₂ is maintained turned on, and the voltage passes from the filter capacitor C₂ through the power switch Q₂ to charge the storage inductor L₁ and the capacitor C₁, causing the current value of the current i_(s) to be changed to a negative value, even though its charging slope is still maintained at −(V_(o)−V_(in))/L₁.

When the storage inductor L₁ obtains certain energy due to charging operation of the capacitor C₂, i.e., when t=t₄, the control circuit SK₁ changes the driving voltage V_(GS2) to zero potential, causing the power switch Q₂ to be turned off, and at this time, the current i₁ is maintained in continuation, and the current i₁ passes from the storage inductor L₁ to the diode D_(a) and to charge the filter capacitor C₁. The value of the current i₁, when the forward voltage drop of the diode D_(a) is not considered, is subject to the following equation (6): $\begin{matrix} {{i_{1}(t)} = {{i_{1}\left( t_{4} \right)} + {\frac{V_{i\quad n}}{L_{1}}\left( {t - t_{4}} \right)}}} & (6) \end{matrix}$

in which, i₁(t₄) is the initial discharging value of the i₁; and V_(in)/L₁ is the charging slope. In this embodiment, when diode D_(a) is turned on by the current i₁, the voltage V_(DS1) between the drain and source of the power switch Q₁ is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at diode D_(a). Therefore, the period where diode D_(a) is maintained turned on is the time for the primary power switch Q₁ to perform a zero-voltage switching operation, and t₅ can be any time spot in this period.

When t=t₃, the control circuit SK₁ outputs a forward pulse wave V_(GS1) to the gate of the power switch Q₁, causing the power switch Q₁ to be turned on, and at this time, the passage impedance at the power switch Q₁ is lower than that of the body diode D. Therefore, current is mainly shunted from the diode D_(a), to the passage at the power switch Q₁, and when the energy is completely discharged from the storage inductor L₁, i.e. when i₁=0, the passage of the power switch Q₁ is maintained turned on, causing the voltage to pass from the filter capacitor C₁ through the power switch Q₁ to charge the storage inductor L₁, and the slope is still maintained at V_(in)/L₁. Therefore, by means of controlling the output time sequence of the output pulse wave V_(GS2) and the output pulse wave V_(GS1), the control circuit SK₁ drives the switches Q₁ and Q₂ to be repeatedly turned on at zero-voltage again and again to effectively protect the switches Q₁ and Q₂ from power loss during a high frequency switching operation.

FIG. 13 shows a circuit design of the present invention used in a buck converter. The circuit comprises an input voltage filter capacitor C₁ bridging the two opposite ends of input power source V_(in), a charging power switch Q₁ and a discharging power switch Q₂ connected in series and bridging the two opposite ends of the filter capacitor C₁, a storage inductor L₁ forming with the discharging power switch Q₂ a series loop bridging the two opposite ends of an output voltage filter capacitor C₂. The storage inductor L₁ and filter capacitor C₁ form a low-pass filter to smooth the high frequency waveform outputted from the switches Q₁ and Q₂, so as to provide a stable DC output voltage V_(o) to the load at its output end.

During operation, the voltage or current waveform of every major component part of the circuit of FIG. 13 is shown in FIG. 14. As illustrated, when t=t₁, the control circuit SK₁ outputs a forward pulse wave driving voltage V_(GS1) to the gate of the power switch Q₁, causing the power switch Q₁ to be turned on, and at this time, the passage of the power switch Q₂ is off, and the input voltage V_(in) is greater than the output voltage V_(in). Therefore, a voltage drop −(V_(in)−V_(o)) exists in the storage inductor L₁, which voltage drop forms a charging current i₂ at the storage inductor L₁, and the value of the charging current i₁ is subject to the following equation (7): $\begin{matrix} {{i_{2}(t)} = {{i_{2}\left( t_{1} \right)} + {\frac{V_{i\quad n} - V_{o}}{L_{1}}\left( {t - t_{1}} \right)}}} & (7) \end{matrix}$

in which, i₂(t₁) is the initial charging value and; (V_(in)−V_(o))/L₁ is the charging slope. At this stage, current i₁=i₂, and i₃=0.

When t=t₂, the control circuit SK₁ changes the forward pulse wave driving voltage V_(GS1) to zero potential, causing the power switch Q₁ to be turned off. At this time, the induction current i₂ must be maintained in continuation, and the passage of the power switch Q₂ is maintained off. The direction of the body diode D_(b) provides a path for the induction current i₂ to charge the filter capacitor C₂, and the voltage at the storage inductor L₁, if the forward voltage drop of the diode D_(b) is not considered, is equal to V_(o) when the body diode D_(b) is turned on, and the value of the induced current i₂ is subject to the following equation (8): $\begin{matrix} {{i_{2}(t)} = {{i_{2}\left( t_{2} \right)} - {\frac{V_{o}}{L_{1}}\left( {t - t_{2}} \right)}}} & (8) \end{matrix}$

in which, i₂ and (t₂) is the initial discharging value of the current i₂, −V_(o0)/L₁ is its discharging slope. In this embodiment, when the diode D_(b) is turned on by the current i₂, the voltage V_(GS2) between the drain and source of the power switch Q₂ is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at the diode D_(b). Therefore, the period where the body diode D_(b) is maintained turned on is the time for the power switch Q₂ to perform a zero-voltage switching operation, and t₃ can be any time spot in this period.

When t=t₃, the control circuit SK₁ outputs a forward pulse wave V_(GS1) to the gate of the power switch Q₂, causing the power switch Q₂ to be turned on, and at this time, the passage impedance at the power switch Q₂ is lower than at the diode b_(a). Therefore, current is mainly shunted from the body diode D_(b), to the passage at the power switch Q₂, and when the energy is completely discharged from the storage inductor L₁, i.e. when i₂=0, the passage of the power switch Q₂ is maintained turned on, causing the voltage to pass from the filter capacitor C₂ through the power switch Q₂ to charge the storage inductor L₁, causing the current i₂ to be changed to negative status, and the slope to still be maintained at −V_(o)/L₁.

When the storage inductor L₁ obtains certain energy due to charging operation of the capacitor C₁, i.e., when t=t₄, the control circuit SK₁ changes the driving voltage V_(GS2) to zero potential, causing the power switch Q₂ to be turned off, and at this time, the current i₂ is maintained in continuation, and the current i₂ passes from the storage inductor L₁ to the diode D_(a) and to charge the filter capacitor C₁. The value of the current i₂, when the forward voltage drop of the diode D_(a) is not considered, is subject to the following equation (9): $\begin{matrix} {{i_{2}(t)} = {{i_{2}\left( t_{4} \right)} + {\frac{V_{i\quad n} - V_{o}}{L_{1}}\left( {t - t_{4}} \right)}}} & (9) \end{matrix}$

in which, i₂(t₄) is the initial discharging value of the inductance and, −(V_(in)−V_(o))/L₁ is its discharging slope. In this embodiment, when the body diode a_(b) is turned on by the current i₂, the voltage V_(DS1) between the drain and source of the power switch Q₁ is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at the body diode D_(a) is reached. Therefore, the period where the diode D_(a) is maintained turned on is the time for the power switch Q₁ to perform a zero-voltage switching operation, and t₃ can be any time spot in this period.

When t=t₃, the control circuit SK₁ outputs a forward pulse wave V_(GS1) to the gate of the power switch Q₁, causing the power switch Q₁ to be turned on, and at this time, the passage impedance at the power switch Q₁ is lower than at the diode D_(a). Therefore current is mainly shunted from the body diode D_(a), to the passage at the power switch Q₁, and when the energy is completely discharged from the storage inductor L₁, i.e. when i₂=0, the passage of the power switch Q₁ is maintained turned on, causing the voltage to pass from the filter capacitor C₁ through the power switch Q₁ to charge the storage inductor L₁, and the capacitor C₂, and the slope to still be maintained at (V_(in)−V_(o))/L₁.

Thus, by means of controlling the output time sequence of the output pulse wave V_(GS1) and the output pulse wave V_(GS2), the control circuit SK₁ drives the switches Q₁ and Q₂ to be repeatedly turned on at zero-voltage again and again to effectively protect the switches Q₁ and Q₂ from power loss during a high frequency switching operation.

Further, the control circuit SK₁ can be designed to operate at a rated or frequency converting mode. When at the rated mode, the inductance of the transformer (or storage capacitor) must be sufficient to satisfy the requirement for zero-voltage control within the range of full load, so that the power switches Q₁ and Q₂ can be turned on at any time under zero-voltage. Therefore, the switching frequency will be lower when the load becomes greater, and vice versa.

In conclusion, the present invention uses a control circuit SK₁ having a zero-voltage control function to drive the power switch means of a flyback converter, boost converter or buck converter to achieve a switching operation under zero-voltage, so that power loss due to a high frequency operation is eliminated. Because the design greatly reduces accumulated heat at the switch means, the size of the heat sink can be greatly reduced. Therefore, the present invention is practical for use in all electronic products of small design.

It is to be understood that the drawings are designed for purposes of illustration only, and are not intended for use as a definition of the limits and scope of the invention disclosed. 

What the invention claimed is:
 1. An exchanging converter comprising: an input voltage filter capacitor bridging two opposite ends of an input power source to provide a stable input voltage; a transformer for storing and releasing electric energy, said transformer comprising a primary winding and a secondary winding; a primary power switch forming with said primary winding a series loop that bridges two opposite ends of said input voltage filter capacitor; an output voltage filter capacitor; a secondary power switch forming with said secondary winding a series loop that bridges two opposite ends of said output voltage filter capacitor for enabling said output voltage filter capacitor to smooth a high frequency switching waveform from said primary and secondary power switches, and to provide a stable DC output voltage to a load that also bridges said two opposite terminals of the output voltage filter capacitor; and a zero-voltage switching control circuit for driving said output voltage filter capacitor to partially feed back storage energy to an input side of said transformer, and for respectively providing a complementary driving signal to said primary power switch and said secondary power switch to control a turn-off time of said primary power switch and said secondary power switch when said primary power switch and said secondary power switch reach a zero-voltage switching control condition, so as to drive said primary power switch and said secondary power switch to repeat the switching operation at zero-voltage again and again.
 2. The exchanging converter of claim 1 wherein said zero-voltage switching control circuit regulates a pulse width of said high frequency switching waveform by detecting said stable DC output voltage.
 3. The exchanging converter of claim 1 or 2 wherein said primary power switch and said secondary power switch are power MOSFETs, each comprising a rectifier diode.
 4. The exchanging converter of claim 3 wherein said primary power switch has a drain connected to said primary winding and a source connected to a negative end of said input voltage filter capacitor; said secondary power switch has a drain connected to a positive end of said output voltage filter capacitor and a source connected to said secondary winding; and said zero-voltage switching control circuit provides said complementary driving signal to the drains of said primary power switch and said secondary power switch.
 5. An exchanging converter comprising: an input voltage filter capacitor bridging two opposite ends of an input power source to provide a stable input voltage; a charging power switch; a storage inductor forming with said charging power switch a series loop that bridges two opposite ends of said output voltage filter capacitor; an output voltage filter capacitor; a discharging power switch forming with said charging power switch a series loop that bridges two opposite ends of said output voltage filter capacitor for enabling said output voltage filter capacitor to provide a stable DC output voltage to a load that also bridges said two opposite terminals of the output voltage filter capacitor; and a zero-voltage switching control circuit for driving said output voltage filter capacitor to partially feed back storage energy to an input side of said storage inductor, and for respectively providing a complementary driving signal to said charging power switch and said discharging power switch to control a turn-off time of said charging power switch and said discharging power switch when said charging power switch and said discharging power switch reach a zero-voltage switching control condition, so as to drive said charging power switch and said discharging power switch to repeat the switching operation at zero-voltage again and again.
 6. The exchanging converter of claim 5 wherein said zero-voltage switching control circuit regulates a pulse width of a switching waveform by detecting said stable DC output voltage.
 7. The exchanging converter of claim 5 or 6 wherein said primary power switch and said secondary power switch are power MOSFETs, each comprising a rectifier diode.
 8. The exchanging converter of claim 7 wherein said charging power switch has a drain connected to said storage inductor and a source connected to a negative end of said input voltage filter capacitor; said discharging power switch has a drain connected to a positive end of said output voltage filter capacitor and a source connected to said storage inductor; and said zero-voltage switching control circuit provides said complementary driving signal to the drains of said charging power switch and said discharging power switch.
 9. An exchanging converter comprising: an input voltage filter capacitor bridging two opposite ends of an input power source to provide a stable input voltage; a charging power switch; a discharging power switch forming with said charging power switch a series loop that bridges two opposite ends of said output voltage filter capacitor for enabling said output voltage filter capacitor to provide a stable DC output voltage to a load that also bridges said two opposite terminals of said output voltage filter capacitor; an output voltage filter capacitor; a storage inductor, said storage inductor forming with said discharging power switch a series loop that bridges two opposite ends of said output voltage filter capacitor, and forming with said output voltage filter capacitor a low-pass filter for providing a stable DC output voltage to a load bridging two opposite terminals of an output end of said output voltage filter capacitor; and a zero-voltage switching control circuit for driving said output voltage filter capacitor to partially feed back storage energy to an input side of said storage inductor, and for respectively providing a complementary driving signal to said charging power switch and said discharging power switch to control a turn-off time of said charging power switch and said discharging power switch when said charging power switch and said discharging power switch reach a zero-voltage switching control condition, so as to drive said charging power switch and said discharging power switch to repeat the switching operation at zero-voltage again and again.
 10. The exchanging converter of claim 9 wherein said zero-voltage switching control circuit regulates a pulse width of a switching waveform by detecting said stable DC output voltage.
 11. The exchanging converter of claim 9 or 10 wherein said primary power switch and said secondary power switch are power MOSFETs, each comprising a rectifier diode.
 12. The exchanging converter of claim 11 wherein said charging power switch has a drain connected to said storage inductor and a source connected to a negative end of said input voltage filter capacitor; said discharging power switch has a drain connected to a positive end of said output voltage filter capacitor and a source connected to said storage inductor; and said zero-voltage switching control circuit provides said complementary driving signal to the drains of said charging power switch and said discharging power switch. 